1. Field of the Invention
The present invention relates to a semiconductor integrated circuit which repairs a memory device from faults.
2. Background Art
In general, the redundancy repairing technique has been used up to now to repair a memory device judged to be defective in memory devices embedded in a semiconductor integrated circuit, by using a redundant memory cell (see, for example, JP-A 2004-47017 (KOKAI) and JP-A 2008-146754 (KOKAI)). Owing to the redundancy repair technique, it is possible to ship the chip as an acceptable article.
For example, a redundant structure in a semiconductor integrated circuit has a spare part including a spare bit cell in association with a row and a column in a memory cell array.
The simplest redundant structure has one set of spare parts for a unit to be repaired. As for more complicated redundant structures, there are a structure having a spare part associated with a row and a column, a structure including a plurality of spares, and a structure in which one memory cell array is divided into a plurality of segments and each segment has a spare part.
In the repair of a memory device, a decision is made whether there is a defect in a memory cell and repair is possible on the basis of the manufacture test and system diagnosis. If repair is possible, a repair circuit is configured to avoid selection of the pertinent defective cell and the repair circuit is adapted to operate by using only normal memory cells. As a result, redundancy repair of the memory device is conducted.
For example, when conducting a manufacture test, data for bringing the memory device into the repaired state (hereafter referred to as repair code) are stored onto a semiconductor integrated circuit or an externally stored repair code is input. As a result, the memory device is repaired.
The defect state of the memory device is different every manufactured die (chip). Therefore, the repair code is stored by using a fuse device or the like according to the defect state.
Usually, the repair code required to repair a defect in a memory device is encoded to minimize a data retaining area and stored. And the stored repair code is decoded and is given to a repair circuit for repairing defects. As a result, the repair circuit changes over a signal path, and the memory device is repaired. In this case, a semiconductor integrated circuit needs to have a decoding circuit for decoding the repair code as the repair circuit.
The defect state of the memory device is different not only every die (chip) as already described, but also every memory device on the semiconductor integrated circuit. In the conventional art, therefore, the semiconductor integrated circuit includes a register which retains a repair code and a decoder which decodes the repair code every memory instance.
In this case, the sum total of the circuit areas for repairing all memory devices of the repair object increases, and the circuit area of the semiconductor integrated circuit itself increases.